CS472
• COMPUTER ARCHITECTURE AND ASSEMBLY
LANGUAGE
– Bruce D’Ambrosio - 107 Dearborn, 7-5563
• [email protected]
– Text: Computer Organization and Design The
Hardware/Software Interface
• Second Edition. Patterson and Hennessy, Morgan
Kaufmann.
Syllabus
• Computer Architecture – processors, memory,
I/O. ISA design issues. Design Philosophies and
tradeoffs. The importance of measurement and
analysis.
• Prereq: ECE/CS 375
• Written Homework: weekly, 30%
• Midterm: 30% each
• Final: 40%
• average 472 grade will be a B or B+; set
expectations accordingly
Schedule
Week
Chapter
1
1-2
2
3
3
3-4
4
4-5
5
5
6
5-6
7
6-7
8
7
9
8
10
9
Notes
Midterm
Holiday
Assignment 1: 2.1-2.6, 2.10-2.13, 2.18-2.21
Due 4/7
Introduction
• Rapidly changing field:
– vacuum tube -> transistor -> IC -> VLSI (see section 1.4)
– doubling every 1.5 years:
memory capacity
processor speed (Due to advances in technology and organization)
• Things you’ll be learning:
– how computers work, a basic foundation
– how to analyze their performance (or how not to!)
– issues affecting modern processors (caches, pipelines)
• Why learn this stuff?
– you want to call yourself a “computer scientist”
– you want to build software people use (need performance)
– you need to make a purchasing decision or offer “expert” advice
Where we are headed
• Performance issues (Chapter 2) vocabulary and
motivation
• A specific instruction set architecture (Chapter 3)
• Arithmetic and how to build an ALU (Chapter 4)
• Constructing a processor to execute our instructions
(Chapter 5)
• Pipelining to improve performance (Chapter 6)
• Memory: caches and virtual memory (Chapter 7)
• I/O (Chapter 8)
Key to a good grade: reading the book!
What is “Computer Architecture”
Computer Architecture =
Instruction Set Architecture +
Machine Organization
Computer Organization
The layered model
Instruction Set Architecture (subset of Computer Arch.)
... the attributes of a [computing] system as seen by the
[systems] programmer, i.e. the conceptual structure and
functional behavior, as distinct from the organization of the
data flows and controls the logic design, and the physical
implementation.
– Amdahl, Blaaw, and Brooks, 1964
-- Organization of Programmable
Storage
SOFTWARE
-- Data Types & Data Structures:
Encodings & Representations
-- Instruction Set
-- Instruction Formats
-- Modes of Addressing and Accessing Data Items and Instructions
-- Exceptional Conditions
Example Organization
• TI SuperSPARCtm TMS390Z50 in Sun
SPARCstation20
MBus Module
SuperSPARC
Floating-point Unit
L2
$
Integer Unit
Inst
Cache
Ref
MMU
Data
Cache
CC
MBus
L64852 MBus control
M-S Adapter
SBus
Store
Buffer
Bus Interface
DRAM
Controller
SBus
DMA
SBus
Cards
SCSI
Ethernet
STDIO
serial
kbd
mouse
audio
RTC
Boot PROM
Floppy
What is “Computer Architecture”?
Application
Operating
System
Compiler
Firmware
Instr. Set Proc. I/O system
Instruction Set
Architecture
Datapath & Control
Digital Design
Circuit Design
Layout
• Coordination of many levels of abstraction
• Under a rapidly changing set of forces
• Design, Measurement, and Evaluation
Exponential Growth
• Machine code
• Single-thread OS
• Multi-thread
• On-line
• Graphical UI
• Multi-media
• Virtual Reality (?)
Forces on Computer Architecture
Technology
Programming
Languages
Applications
Computer
Architecture
Operating
Systems
History
(A = F / M)
Technology => dramatic change
• Processor
– logic capacity: about 30% per year
– clock rate:
about 20% per year
• Memory
– DRAM capacity: about 60% per year (4x every 3
years)
– Memory speed: about 10% per year
– Cost per bit: improves about 25% per year
• Disk
– capacity: about 60% per year
Technology
DRAM chip capacity
DRAM
Year
Size
1980
64 Kb
1983
256 Kb
1986
1 Mb
1989
4 Mb
1992
16 Mb
1996
64 Mb
1999
256 Mb
2002
1 Gb
Microprocessor Logic Density
uP-Name
• In ~1985 the single-chip processor (32-bit) and the singleboard computer emerged
– => workstations, personal computers, multiprocessors have been
riding this wave since
• In the 2002+ timeframe, these may well look like
mainframes compared single-chip computer (maybe 2
chips)
Processor Performance (SPEC)
performance now improves 50% per year (2x every 1.5 years)
350
300
RISC
Performance
250
200
RISC
introduction
150
100
Intel x86
35%/yr
50
0
1982
1984
1986
1988
1990
1992
1994
Year
Did RISC win the technology battle and lose the market war?
Measurement and Evaluation
Design
Architecture is an iterative process
-- searching the space of possible designs
-- at all levels of computer systems
Analysis
Creativity
Cost /
Performance
Analysis
Good Ideas
Bad Ideas
Mediocre Ideas
CS472: So what's in it for me?
• In-depth understanding of the inner-workings of
modern computers, their evolution, and trade-offs
present at the hardware/software boundary.
– Insight into fast/slow operations that are easy/hard to
implementation hardware
• Experience with the design process in the context of
a large complex (hardware) design.
– Functional Spec --> Control & Datapath --> Physical
implementation
– Modern CAD tools
• Designer's "Conceptual" toolbox.
Levels of Representation (271 Review)
temp = v[k];
High Level Language
Program
v[k] = v[k+1];
v[k+1] = temp;
Compiler
lw $15,
lw $16,
sw$16,
sw$15,
Assembly Language
Program
Assembler
Machine Language
Program
0000
1010
1100
0101
1001
1111
0110
1000
1100
0101
1010
0000
0($2)
4($2)
0($2)
4($2)
0110
1000
1111
1001
1010
0000
0101
1100
1111
1001
1000
0110
0101
1100
0000
1010
1000
0110
1001
1111
Machine Interpretation
Control Signal
Specification
°
°
ALUOP[0:3] <= InstReg[9:11] & MASK
Layered Machine model
Digital Logic Level
• Logical Abstraction
of physical hardware
• Basic elements are
gates.
• How are gates
composed?
MicroArchitecture
• Registers
• Datapaths
• Functional Units
– ALU
• First view of entire
machine - sort of
Instruction Set Architecture
• Instruction-visible
registers
• Instruction-view of
storage
• Instructionavailable operations
• Instruction word
format
ISA View of CPU (Cont’d)
Operating System Level
• Storage
management
– Memory
– Files
• Programs
• Processes
• Communication
Assembly Language Level
• Symbolic language
– Keywords
– Name management
– Pseudo-Operations
• Meta-language
– macros
000010
100001
111001
001100
Limit: WORD 2
A:
ADD R1, R0
CMP R0, Limit
BLT A
Basics of software development
• Program development environment
–
–
–
–
Assembler
Linker
Loader
Debugger
What you should know
• Basic machine structure
– processor, memory, I/O
• Read and write a high-level language
• Read assembly language
• Understand the concept of virtual memory
• Logic design
– logical equations, schematic diagrams, FSMs,
components
Levels of Organization
SPARCstation 20
Computer
Workstation Design Target:
25% of cost on Processor
25% of cost on Memory
(minimum memory size)
Rest on I/O devices,
power supplies, box
Processor
Memory
Devices
Control
Input
Datapath
Output
Execution Cycle
Instruction
Obtain instruction from program storage
Fetch
Instruction
Determine required actions and instruction size
Decode
Operand
Locate and obtain operand data
Fetch
Execute
Result
Compute result value or status
Deposit results in storage for later use
Store
Next
Instruction
Determine successor instruction
The SPARCstation 20
SPARCstation 20
Memory SIMMs
Memory
Controller
SIMM Bus
MBus
MBus
Slot 1
MBus
Slot 0
MSBI
Disk
SBus
Slot 1
SBus
Slot 3
SBus
Slot 0
SBus
Slot 2
SEC
MACIO
SBus
Keyboard
Floppy
& Mouse
Disk
External Bus
Tape
SCSI
Bus
The Underlying Interconnect
SPARCstation 20
SIMM Bus
Memory
Controller
Processor/Mem Bus:
MBus
Standard I/O Bus:
SCSI Bus
Sun’s High Speed I/O Bus:
SBus
MSBI
SEC
MACIO
Low Speed I/O Bus:
External Bus
Processor and Caches
SPARCstation 20
MBus Module
Processor
MBus
MBus
Slot 1
MBus
Slot 0
Registers
Datapath
Internal
Cache
Control
External Cache
Memory
DRAM SIMM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
SIMM Slot 7
SIMM Slot 6
SIMM Slot 5
SIMM Slot 4
SIMM Slot 3
SIMM Slot 2
SIMM Slot 1
Memory
Controller
SIMM Slot 0
SPARCstation 20
Memory SIMM Bus
Input and Output (I/O) Devices
• SCSI Bus: Standard I/O
Devices
• SBus: High Speed I/O
Devices
• External Bus: Low Speed
SBus
Slot 1
I/O Device
SBus
Slot 0
SPARCstation 20
Disk
SBus
Slot 3
SBus
Slot 2
SBus
SEC
MACIO
Keyboard
Floppy
& Mouse
Disk
External Bus
Tape
SCSI
Bus
Standard I/O Devices
SPARCstation 20
• SCSI = Small Computer Systems
Interface
• A standard interface (IBM, Apple, HP,
Sun ... etc.)
• Computers and I/O devices communicate
with each other
• The hard disk is one I/O device resides on
the SCSI Bus
Disk
Tape
SCSI
Bus
High Speed I/O Devices
SPARCstation 20
• SBus is SUN’s own high speed I/O bus
• SS20 has four SBus slots where we can plug
in I/O devices
• Example: graphics accelerator, video
adaptor, ... etc.
• High speed and low speed are relative terms
SBus
Slot 1
SBus
Slot 3
SBus
Slot 0
SBus
Slot 2
SBus
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CS271 - Oregon State University