Introduction to Computer Organization
• What is inside a computer?
• How does it execute my program?
?
System Organization
Processor
interrupts
Cache
Memory Bus
I/O Bridge
Core Chip Set
I/O Bus
Main
Memory
Disk
Controller
Disk
Disk
Graphics
Controller
Graphics
Network
Interface
Network
What is Computer Architecture?
• Coordination of levels of abstraction
Application
Operating
System
Compiler
Firmware
CPU Memory I/O system
Digital Design
Circuit Design
Software
Interface Between
HW and SW
Instruction
Set
Architecture,
Memory, I/O
Hardware
• Under a set of rapidly changing Forces
Application (Netscape)
Operating
Compiler
System
Assembler (Windows 98)
Software
Hardware ProcessorMemory I/O system
Datapath & Control
Digital Design
Circuit Design
transistors
• Coordination of many levels of abstraction
Instruction Set
Architecture
Computer System: Layers of Abstraction
Application Program
Algorithms
Software
Hardware
Language
Instruction Set Architecture
(and I/O Interfaces)
Microarchitecture
Circuits
Devices
Levels of Representation
temp = v[k];
High Level Language
Program
v[k] = v[k+1];
v[k+1] = temp;
Compiler
lw $15,
lw $16,
sw $16,
sw $15,
Assembly Language
Program
Assembler
Machine Language
Program
0000
1010
1100
0101
1001
1111
0110
1000
1100
0101
1010
0000
Rd
Reg Dst
Machine Interpretation
0($2)
4($2)
0($2)
4($2)
0110
1000
1111
1001
1111
1001
1000
0110
0101
1100
0000
1010
Rt
Mux
Rs
Reg Wr
1010
0000
0101
1100
5
5
5
Don ’t Care
(Rt)
ALUctr
Me mto Reg
b usA
Rw
32
b usB
im m1 6
16
M ux
32
32
WrEn
Adr
Dat a In
32
32
Clk
ALUSr c
Ex tOp
32
Me mWr
Data
Me mo ry
M ux
3 2 3 2-bit
Reg ister s
32
Clk
E x te nde r
Control Signal
Specification
Rb
A LU
b usW
Ra
1000
0110
1001
1111
Universal Computing Device
•All computers, given enough time and memory,
are capable of computing exactly the same things.
=
PDA
=
Workstation
PDA (Personal Digital Assistant)
Supercomputer
Evolution of Multilevel Machines
•
•
•
•
•
Bare hardware
Microprogramming
Operating system
Compilers
Hardware / software interface
–
–
–
–
Simple ISA
CISC
RISC
EPIC (Explicitly Parallel Instruction Computing)
• RISC and CISC designs
– Reduced Instruction Set Computer (RISC)
• Uses simple instructions
• Operands are assumed to be in processor registers
– Not in memory
– Simplifies design
» Example : Fixed instruction size
– Complex Instruction Set Computer (CISC)
• Uses complex instruction
• Operands can be in registers or memory
– Instruction size varies
• Typically uses a microprogram
Computer Organization
Von Neumann
Machine
Processor
Accumulator หน่วยความจาส่ วนที่ใช้เก็บผลที่ได้จากการคานวณ โดยเก็บเอาไว้ในตาแหน่ง
ของ register
Processor and Caches
Processor Module
Processor
Registers
Datapath
Internal
Cache
Control
External Cache
To main memory
Datapath
Memory
I/O
Bus-Based Computer
Anatomy of a Modern PC
(Peripheral Component Interconnet)
(Industry Standard Architecture)
Multiprocessors
Forces on Computer Architecture
Technology
Programming
Languages
Applications
Computer
Architecture
Operating
Systems
History
(A = F / M)
Applications and Languages
•
•
•
•
•
•
•
CAD, CAM, CAE, . . .
Lotus, DOS, . . .
Multimedia, . . .
The Web, . . .
JAVA, . . .
The Net => ubiquitous computing
???
Where are We Going??
Input
Multiplier
Input
Multiplicand
32
Multiplicand
Register
LoadMp
32=>34
signEx
<<1
32
34
34
32=>34
signEx
0
Multi x2/x1
Arithmetic
34
34
Sub/Add
34-bit ALU
Control
Logic
32
32
2
ShiftAll
LO register
(16x2 bits)
Prev
2
Booth
Encoder
HI register
(16x2 bits)
LO[1]
2
"LO
[0]"
34
Extra
2 bits
ENC[2]
ENC[1]
ENC[0]
LoadLO
LoadHI
2
ClearHI
Single/multicycle
Datapaths
1
34x2 MUX
32
Result[HI]
LO[1:0]
32
Result[LO]
1000
Exec Mem WB
IFetchDcd
Exec Mem WB
Performance
100
Processor-Memory
Performance Gap:
(grows 50% / year)
10
DRAM
9%/yr.
DRAM(2X/10
yrs)
1
198
1
098
1
198
198
2
198
3
1
498
198
5
198
6
198
7
198
8
199
9
199
0
199
199
2
1
399
199
4
199
5
1
699
199
7
8
199
200
9
0
IFetchDcd
‫מבנה‬
‫מחשבים‬
“Moore’s Law”
µProc
CPU 60%/yr.
(2X/1.5yr)
Time
IFetchDcd
Exec Mem WB
IFetchDcd
Exec Mem WB
Pipelining
I/O
Memory Systems

Descargar

ไม่มีชื่อเรื่องภาพนิ่ง